UPD70F3763GC-UEU-AX Renesas Electronics America, UPD70F3763GC-UEU-AX Datasheet - Page 1208
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UPD70F3763GC-UEU-AX
Manufacturer Part Number
UPD70F3763GC-UEU-AX
Description
MCU 32BIT V850ES/JX3-U 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3763GC-UEU-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
75
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3763GC-UEU-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(1) External interrupt falling, rising edge specification register 0 (INTF0, INTR0)
Note V850ES/JH3-U only
Remark
The INTF0 and INTR0 registers are 8-bit registers that specify detection of the falling and rising edges of the NMI
pin via bit 2 and the external interrupt pins (INTP00 to INTP04) via bits 0, 1, 3 to 5.
These registers can be read or written in 8-bit or 1-bit units.
Reset sets these registers to 00H.
Caution When the function is changed from the external interrupt function (alternate function) to the port
Caution Be sure to set the INTF0n and INTR0n bits to 00 when these registers are not used as the NMI or
Remark
INTF0n
For how to specify a valid edge, see Table 23-5.
function, an edge may be detected. Therefore, set the INTF0n and INTR0n bits to 00, and then set
the port mode.
INTP00 to INTP04 pins.
n = 0, 1:
n = 2:
n = 3 to 5: Control of INTP02 to INTP04 pins
INTR0
0
0
1
1
INTF0
After reset: 00H
Control of INTP00 and INTP01 pins
Control of NMI pin
INTR0n
7
0
7
0
0
1
0
1
R/W
6
0
6
0
Table 23-5. Valid Edge Specification
CHAPTER 23 INTERRUPT/EXCEPTION PROCESSING FUNCTION
No edge detected
Rising edge
Falling edge
Both rising and falling edges
Address: INTF0 FFFFFC00H, INTR0 FFFFFC20H
INTR05
INTF05
INTP04
INTP04
5
5
Note
Note
INTR04
INTF04
INTP03
INTP03
4
4
Valid Edge Specification (n = 0 to 5)
Note
Note
INTF03
INTP02
INTR03
INTP02
3
3
INTR02 INTR01
INTF02
NMI
NMI
2
2
INTF01
INTP01
INTP01
1
1
Note
Note
INTF00
INTR00
INTP00
INTP00
0
0
Note
Note
Page 1208 of 1408
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