DF2317VTE25 Renesas Electronics America, DF2317VTE25 Datasheet - Page 510

MCU 3V 128K 100-TQFP

DF2317VTE25

Manufacturer Part Number
DF2317VTE25
Description
MCU 3V 128K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2317VTE25

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
79
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2317VTE25
HD64F2317VTE25

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2317VTE25V
Manufacturer:
AD
Quantity:
3 643
Part Number:
DF2317VTE25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 12 Serial Communication Interface (SCI)
In serial transmission, the SCI operates as described below.
[1] The SCI monitors the TDRE flag in SSR, and if is 0, recognizes that data has been written to
[2] After transferring data from TDR to TSR, the SCI sets the TDRE flag to 1 and starts
[3] The SCI checks the TDRE flag at the timing for sending the stop bit.
Rev.7.00 Feb. 14, 2007 page 476 of 1108
REJ09B0089-0700
TDR, and transfers the data from TDR to TSR.
transmission.
If the TIE bit is set to 1 at this time, a transmit-data-empty interrupt (TXI) is generated.
The serial transmit data is sent from the TxD pin in the following order.
[a] Start bit:
[b] Transmit data:
[c] Multiprocessor bit
[d] Stop bit(s):
[e] Mark state:
If the TDRE flag is cleared to 0, data is transferred from TDR to TSR, the stop bit is sent, and
then serial transmission of the next frame is started.
If the TDRE flag is set to 1, the TEND flag in SSR is set to 1, the stop bit is sent, and then the
mark state is entered in which 1 is output continuously. If the TEIE bit in SCR is set to 1 at this
time, a transmit-end interrupt (TEI) request is generated.
One 0-bit is output.
8-bit or 7-bit data is output in LSB-first order.
One multiprocessor bit (MPBT value) is output.
One or two 1-bits (stop bits) are output.
1 is output continuously until the start bit that starts the next transmission is sent.

Related parts for DF2317VTE25