DF2317VTE25 Renesas Electronics America, DF2317VTE25 Datasheet - Page 331

• Manufacturer Part Number: DF2317VTE25
• Description: MCU 3V 128K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2317VTE25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 79
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2317VTE25; HD64F2317VTE25

Bit 1—Address 21 Enable (A21E): Enables or disables address output 21 (A21). For details, see
section 8.2, Port 1.
Bit 0—Address 20 Enable (A20E): Enables or disables address output 20 (A20). For details, see
section 8.2, Port 1.
Port Function Control Register 2 (PFCR2)
PFCR2 is an 8-bit readable/writable register that performs I/O port control. PFCR2 is initialized to
H'30 by a reset, and in hardware standby mode. This bit is valid in modes 4 to 6.
Bits 7 and 6—Reserved: Only 0 should be written to these bits.
Bit 5—CS167 Enable (CS167E): Enables or disables CS1, CS6, and CS7 output. Change the
CS167E setting only when the DDR bits are cleared to 0.
Bit 5
CS167E
0
1
Bit 4—CS25 Enable (CS25E): Enables or disables CS2, CS3, CS4, and CS5 output. Change the
CS25E setting only when the DDR bits are cleared to 0. This bit is valid in modes 4 to 6.
Bit 4
CS25E
0
1
Bit 3—AS Output Disable (ASOD): Enables or disables AS output. This bit is valid in modes 4
to 6. For details, see section 8.11, Port F.
Bits 2 to 0—Reserved: When read, these bits are always read as 0.
Bit
Initial value :
R/W
:
:
Description
CS1, CS6, and CS7 output disabled (can be used as I/O ports)
CS1, CS6, and CS7 output enabled
Description
CS2, CS3, CS4, and CS5 output disabled (can be used as I/O ports)
CS2, CS3, CS4, and CS5 output enabled
R/W
—
7
0
R/W
—
6
0
CS167E
R/W
5
1
CS25E
R/W
4
1
Rev.7.00 Feb. 14, 2007 page 297 of 1108
ASOD
R/W
3
0
—
R
2
0
Section 8 I/O Ports
REJ09B0089-0700
—
R
0
1
(Initial value)
(Initial value)
—
R
0
0