DF2317VTE25 Renesas Electronics America, DF2317VTE25 Datasheet - Page 351

• Manufacturer Part Number: DF2317VTE25
• Description: MCU 3V 128K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2317VTE25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 79
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2317VTE25; HD64F2317VTE25

9.2.3
Note: When TGRC or TGRD is designated for buffer operation, this setting is invalid and the
The TIOR registers are 8-bit registers that control the TGR registers. The TPU has eight TIOR
registers, two each for channels 0 and 3, and one each for channels 1, 2, 4, and 5. The TIOR
registers are initialized to H'00 by a reset and in hardware standby mode.
Care is required since TIOR is affected by the TMDR setting. The initial output specified by
TIOR is valid when the counter is stopped (the CST bit in TSTR is cleared to 0). Note also that, in
PWM mode 2, the output at the point at which the counter is cleared to 0 is specified.
Channel 0: TIOR0H
Channel 1: TIOR1
Channel 2: TIOR2
Channel 3: TIOR3H
Channel 4: TIOR4
Channel 5: TIOR5
Bit
Initial value :
R/W
Channel 0: TIOR0L
Channel 3: TIOR3L
Bit
Initial value :
R/W
register operates as a buffer register.
Timer I/O Control Registers (TIOR)
:
:
:
:
IOD3
IOB3
R/W
R/W
7
0
7
0
IOB2
IOD2
R/W
R/W
6
0
6
0
IOD1
IOB1
R/W
R/W
5
0
5
0
IOD0
IOB0
R/W
R/W
4
0
4
0
Rev.7.00 Feb. 14, 2007 page 317 of 1108
Section 9 16-Bit Timer Pulse Unit (TPU)
IOA3
IOC3
R/W
R/W
3
0
3
0
IOA2
IOC2
R/W
R/W
2
0
2
0
REJ09B0089-0700
IOC1
IOA1
R/W
R/W
1
0
1
0
IOC0
IOA0
R/W
R/W
0
0
0
0