DF2317VTE25 Renesas Electronics America, DF2317VTE25 Datasheet - Page 229
![MCU 3V 128K 100-TQFP](/photos/28/61/286108/100-tqfp_sml.jpg)
DF2317VTE25
Manufacturer Part Number
DF2317VTE25
Description
MCU 3V 128K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.D12312SVTE25V.pdf
(1146 pages)
Specifications of DF2317VTE25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
79
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2317VTE25
HD64F2317VTE25
HD64F2317VTE25
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
DF2317VTE25V
Manufacturer:
AD
Quantity:
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Company:
Part Number:
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Manufacturer:
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Quantity:
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Table 7.2
CHNE
0
0
0
1
1
1
1
The DTC transfer mode can be normal mode, repeat mode, or block transfer mode.
The 24-bit SAR designates the DTC transfer source address and the 24-bit DAR designates the
transfer destination address. After each transfer, SAR and DAR are independently incremented,
decremented, or left fixed.
Table 7.3 outlines the functions of the DTC.
CHNS
—
—
—
0
1
1
1
1st Transfer
Chain Transfer Conditions
DISEL
0
0
1
—
0
—
1
CR
Not 0
0
—
—
Not 0
0
Not 0
CHNE
—
—
—
0
0
0
—
0
0
0
—
CHNS
—
—
—
—
—
—
—
—
—
—
—
2nd Transfer
DISEL
—
—
—
0
0
1
—
0
0
1
—
Rev.7.00 Feb. 14, 2007 page 195 of 1108
Section 7 Data Transfer Controller
CR
—
—
—
Not 0
0
—
—
Not 0
0
—
—
DTC Transfer
Ends at 1st transfer
Ends at 1st transfer
Interrupt request to CPU
Ends at 2nd transfer
Ends at 2nd transfer
Interrupt request to CPU
Ends at 1st transfer
Ends at 2nd transfer
Ends at 2nd transfer
Interrupt request to CPU
Ends at 1st transfer
Interrupt request to CPU
REJ09B0089-0700
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