QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 93

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

Host Bridge Device 0 - Configuration Registers (D0:F0)
5.1.16
Datasheet
GGC - (G)MCH Graphics Control (Device 0)
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
15:7
6:4
3:2
Bit
1
0
Access
R/W/L
R/W/L
RO
RO
RO
00000000
Default
Value
011b
00b
0b
0b
0b
Reserved
Graphics Mode Select (GMS):
This field is used to select the amount of Main Memory that is
pre-allocated to support the Internal Graphics device in VGA
(non-linear) and Native (linear) modes. The BIOS ensures
that memory is pre-allocated only when Internal graphics is
enabled.
Stolen Memory Bases is located between (TOLUD - SMSize) to
TOUD.
000 = No memory pre-allocated. Device 2 (IGD) does not
claim VGA cycles (Mem and IO), and the Sub-Class Code field
within Device 2 Function 0. Class Code register is 80.
001 = DVMT (UMA) mode, 1 MB of memory pre-allocated for
frame buffer.
011 = DVMT (UMA) mode, 8 MB of memory pre-allocated for
frame buffer.
Others = Reserved
Note:This register is locked and becomes Read Only when the
D_LCK bit in the SMRAM register is set.
Hardware does not clear or set any of these bits automatically
based on IGD being disabled/enabled.
Reserved
IGD VGA Disable (IVD)
1: Disable. Device 2 (IGD) does not claim VGA cycles (Mem
and IO), and the Sub-Class Code field within Device 2
Function 0 Class Code register is 80.
0: Enable (Default). Device 2 (IGD) claims VGA memory and
IO cycles, the Sub-Class Code within Device 2 Class Code
register is 00.
Reserved
0/0/0/PCI
52-53h
0030h
R/W/L; RO
16 bits
Description
93