QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 87
QG82945GSE S LB2R
Manufacturer Part Number
QG82945GSE S LB2R
Description
GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
Manufacturer
Intel
Datasheet
1.AU80586GE025DSLB73.pdf
(482 pages)
- Current page: 87 of 482
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Host Bridge Device 0 - Configuration Registers (D0:F0)
5.1.10
5.1.11
Datasheet
PAGE BREAKSID - Subsystem Identification
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This value is used to identify a particular subsystem.
CAPPTR - Capabilities Pointer
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
The CAPPTR provides the offset that is the pointer to the location of the first device
capability in the capability list.
7:0
Bit
15:0
Bit
Access
Access
RO
R/WO
Default
Value
E0h
Default
Value
0000h
Pointer to the Offset of the First Capability ID Register
Block:
In this case the first capability is the product-specific Capability
Identifier (CAPID0).
Subsystem ID (SUBID):
This field should be programmed during BIOS initialization.
After it has been written once, it becomes read only.
0/0/0/PCI
2E-2Fh
0000h
R/WO
16 bits
0/0/0/PCI
34h
E0h
RO
8 bits
Description
Description
87
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