QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 188
QG82945GSE S LB2R
Manufacturer Part Number
QG82945GSE S LB2R
Description
GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
Manufacturer
Intel
Datasheet
1.AU80586GE025DSLB73.pdf
(482 pages)
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6.4.20
188
TERRCMD - Thermal Error Command
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register select which errors are generate a SERR DMI interface special cycle, as
enabled by ERRCMD [SERR Thermal Sensor event].The SERR and SCI must not be
enabled at the same time for the thermal sensor event.
7:5
4:4
3:3
2:2
1:1
0:0
Bit
15:8
7:0
Bit
Access
R/W
R/W
R/W
R/W
R/W
Access
RO
R/W/L
R/W/L
Default
Value
Default
0h
0b
0b
0b
0b
0b
Value
00h
00h
Reserved
Reserved
SERR on Aux1 Thermal SensorEvent:
1 = Enable
0 = Disable
SERR on Catastrophic Thermal Sensor Event:
1 =Enable
0 = Disable
SERR on Hot Thermal Sensor Event:
1 = Enable
0 = Disable
SERR on Aux0 Thermal Sensor Event:
1 = Enable
0 = Disable
Reserved
Aux1 Trip Point Setting (A1TPS):
Sets the target value for the Aux1 trip point.
Lockable by TSTTP2-0[31].
0/0/0/MCHBAR
CF0h
00h
R/W; RO
8 bits
Description
Description
Device 0 Memory Mapped I/O Register
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