QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 157

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

Device 0 Memory Mapped I/O Register
6.2.67.1
Datasheet
GBRCOMPCTL - Global/System Memory RCOMP Control
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register controls the Global and System Memory RCOMP feature.
30:24
23:12
7:1
Bit
31
23
24
11
8
0
Access
R/W/L
R/W/L
R/W/L
R/W/L
R/W/L
R/W/L
R/W/L
R/W/L
RO
Default
Value
000h
0b
0h
1b
0b
0b
0b
0b
Global RCOMP Lock Bit:
Once this bit is set, any further writes to all MCHBAR-IO and
MCHBAR-DRAMIO registers will be ignored.
Reserved
Global Periodic RCOMP Disable:
0: Enable Periodic RCOMP
1: Disable Periodic RCOMP
Reserved
Reserved
Reserved
Initial SM RCOMP Enable:
This bit is set after BIOS completed all SM RCOMP required
registers.
Reserved
SM RCOMP Digital Filter Enable:
0 = Disable Digital Filter
1 = Digital Filter Enable
0/0/0/MCHBAR
400-403h
R/W/L; RO
32 bits
Description
157