QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 365
QG82945GSE S LB2R
Manufacturer Part Number
QG82945GSE S LB2R
Description
GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
Manufacturer
Intel
Datasheet
1.AU80586GE025DSLB73.pdf
(482 pages)
- Current page: 365 of 482
- Download datasheet (4Mb)
Functional Description
10.4.1.3.2
10.4.1.3.3
10.4.1.3.4
10.4.1.3.5
Datasheet
Pixel Accurate “Fast” Scissoring and Clipping Operation
The Mobile Intel 945GM/GME/GMS/GU/GSE, 943/940GML and Intel 945GT Express
Chipsets support 2D clipping to a scissor rectangle within the drawing window. Objects
are clipped to the scissor rectangle, avoiding processing pixels that fall outside the
rectangle. The (G)MCH’s clipping and scissoring in hardware reduce the need for
software to clip objects, and thus improve performance. During the setup stage,
(G)MCH clips objects to the scissor window.
A scissor rectangle accelerates the clipping process by allowing the driver to clip to a
bigger region than the hardware renders to. The scissor rectangle needs to be pixel
accurate, and independent of line and point width. (G)MCH will support a single scissor
box rectangle, which can be enabled or disabled. The rectangle is defined as an
Inclusive box. Inclusive is defined as “draw the pixel if it is inside the scissor rectangle.”
Depth Bias
The Mobile Intel 945GM/GME and Intel945GT Express Chipsets support source Depth
Biasing in the Setup Engine. Depth Bias value is specified in the vertex command
packet on a per primitive basis. The value ranges from -1 to 1. The Depth Bias value is
added to the z value of the vertices. This is used for coplanar polygon priority. If two
polygons are to be rendered which are coplanar, due to the inherent precision
differences induced by unique x, y and z values, there is no guarantee which polygon
will be closer or farther. By using Depth Bias, it is possible to offset the destination z
value (compare value) before comparing with the new z value.
B ackface Culling
As part of the setup, the Mobile Intel 945GM/GME/GMS/GU/GSE, 943/940GML and
Intel 945GT Express Chipsets discard polygons from further processing, if they are
facing away from or towards the user’s viewpoint. This operation, referred to as “Back
Face Culling” is accomplished based on the “clockwise” or “counter-clockwise”
orientation of the vertices on a primitive. This can be enabled or disabled by the driver.
Color Shading Modes
The Raster Engine supports the flat and Gouraud shading modes. These shading modes
are programmed by the appropriate state variables issued through the command
stream.
Flat shading is performed by smoothly interpolating the vertex intrinsic color
components (Red, Green, Blue), Specular Highlights (R,G,B), Fog, and Alpha to the
pixel, where each vertex color has the same value. The setup engine substitutes one of
the vertex’s attribute values for the other two vertices attribute values thereby creating
the correct flat shading terms. This condition is set up by the appropriate state
variables issued prior to rendering the primitive.
OpenGL and D3D use a different vertex to select the flat shaded color. This vertex is
defined as the “provoking vertex.” In the case of strips/fans, after the first triangle,
attributes on every vertex that define a primitive are used to select the flat color of the
primitive. A state variable is used to select the “flat color” prior to rendering the
primitive.
Gouraud shading is performed by smoothly interpolating the vertex intrinsic color
components (Red, Green, Blue). Specular Highlights (R,G,B), Fog, and Alpha to the
pixel, where each vertex color has a different value.
All the attributes can be selected independently from one of the shading modes by
setting the appropriate value state variables.
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