QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 393

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QG82945GSE S LB2R

Manufacturer Part Number
QG82945GSE S LB2R
Description
GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
Manufacturer
Intel
Datasheet
Functional Description
10.7.1.2.5
10.7.2
Note:
Datasheet
Thermal Throttling Options
The Mobile Intel 945GM/GME/PM/GMS/GU/GSE, 943/940GML and Intel 945GT Express
Chipsets have two independent mechanisms that cause system memory throttling.
External Thermal Sensor Interface Overview
While it is possible for Intel to set throttling values which will minimally impact typical
application performance in a typical environment, due to the possibility that a bad
thermal platform solution can cause overheating of box skin temperature, and that
such a bad platform is unlikely to include external thermal sensors for its SO-DIMMS, it
become necessary for the customers to have a means to determine the settings for
their platforms throttling. This is further complicated by the fact that different memory
vendors will have varying thermal performance.
An external thermal sensor with a serial interface such as the National Semi LM77,
LM87 - or other - may be placed next to a SO- DIMM (or any other appropriate platform
location), or a remote Thermal Diode (see Maxim 6685) may be placed next to the SO-
DIMM (or any other appropriate platform location) and connected to the external
Thermal Sensor.
The External Sensor can be connected to the ICH via the SMBus Interface to allow
programming and setup by BIOS software over the serial interface. The External
Sensor’s output should include at least one Active-Low Open-Drain signal indicating an
Over-Temp condition (e.g., LM77 T_CRIT# or INT# in comparator mode), which
remains asserted for as long as the Over-Temp Condition exists, and deasserts when
Temperature has returned to within normal operating range. This External Sensor
output will be connected to the (G)MCH input (EXTTS0#) and will trigger a preset
Interrupt and/or Throttle on a level-sensitive basis. If the External Sensor has two trip
point outputs, the other can be connected to the (G)MCH EXTTS1# input to trigger a
preset interrupt or throttle action.
Additional external Thermal Sensor’s outputs, for multiple sensors, can be wire-OR’d
together allow signaling from multiple sensors located physically separately. Software
can, if necessary, distinguish which SO-DIMM(s) is the source of the over-temp through
the serial interface. However, since the SO-DIMM’s will be located on the same Memory
Bus Data lines, any (G)MCH-based Read Throttle will apply equally.
The use of external sensors that include an internal pull-up resistor on the open-drain
thermal trip output is discouraged; however it may be possible depending on the size of
the pull-up and the voltage of the sensor.
The PM_ EXTTS1# signal may be optionally used to improve exit latency from the C4E
state. See
• (G)MCH Thermal Management: This is to ensure that the chipset is operating within
• DRAM Thermal Management: This is to ensure that the DRAM chips are operating
thermal limits. The mechanism can be initiated by a thermal sensor (internal or
external) trip or by write bandwidth measurement exceeding a programmed
threshold via a weighted input averaging filter.
within thermal limits. The Mobile Intel 945GM/GME/PM/GMS/GU/GSE, 943/940GML
and Intel 945GT Express Chipsets can control the amount of (G)MCH - initiated
bandwidth per rank to a programmable limit via a weighted input averaging filter.
Throttling can be initiated by an external thermal sensor trip or by DRAM activity
measurement exceeding a programmed threshold.
Section 10.6.7
for more details.
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