QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 286

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

8.1.18
8.1.19
8.1.20
286
INTRLINE - Interrupt Line
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
INTRPIN - Interrupt Pin
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
MINGNT - Minimum Grant
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
7:0
7:0
7:0
Bit
Bit
Bit
Access
Access
Access
R/W
RO
RO
Default
Default
Default
Value
Value
Value
00h
01h
00h
Interrupt Connection:
Used to communicate interrupt line routing information. POST
software writes the routing information into this register as it
initializes and configures the system. The value in this register
indicates which input of the system interrupt controller that the
device’s interrupt pin is connected to.
Interrupt Pin:
As a single function device, the IGD specifies INTA# as its
interrupt pin.
Minimum Grant Value:
The IGD does not burst as a PCI-compliant master.
01h:INTA#.
Internal Graphics Device 2 Configuration Register (D2:F0-F1)
0/2/0/PCI
3Ch
00h
R/W
8 bits
0/2/0/PCI
3Dh
01h
RO
8 bits
0/2/0/PCI
3Eh
00h
RO
8 bits
Description
Description
Description
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