QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 381
QG82945GSE S LB2R
Manufacturer Part Number
QG82945GSE S LB2R
Description
GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
Manufacturer
Intel
Datasheet
1.AU80586GE025DSLB73.pdf
(482 pages)
- Current page: 381 of 482
- Download datasheet (4Mb)
Functional Description
10.5.4.4.2
Note:
10.5.4.4.3
10.5.4.4.4
10.5.4.4.5
10.5.4.4.6
10.5.4.4.7
10.5.4.4.8
Datasheet
Direct YUV from Overlay
Analog Content Protection
DVI, a 3.3 V flat panel interface standard, is a prime candidate for SDVO. The Mobile
Intel 945GM/GME/GMS/GU/GSE, 943/940GML and Intel 945GT Express Chipsets
provide unscaled mode where the display is centered on the panel.
Monitor Hot Plug functionality is supported for TMDS devices.
Hot Plug is not supported on the Ultra Mobile Intel 945GU Express Chipset.
SDVO LVDS
The Mobile Intel 945GM/GME/GMS/GU/GSE, 943/940GML and Intel 945GT Express
Chipsets may use the SDVO port to drive an LVDS transmitter. Flat Panel is a fixed
resolution display. The (G)MCH supports panel fitting in the transmitter, receiver or an
external device, but has no native panel fitting capabilities. The (G)MCH will however,
provide unscaled mode where the display is centered on the panel. Scaling in the LVDS
transmitter through the SDVO stall input pair is also supported.
The SDVO port supports both standard and high-definition TV displays in a variety of
formats. The SDVO port generates the proper blank and sync timing, but the external
encoder is responsible for generation of the proper format signal and output timings.
(G)MCH will support NTSC/PAL/SECAM standard definition formats. The (G)MCH will
generate the proper timing for the external encoder. The external encoder is
responsible for generation of the proper format signal.
The TV-out interface on (G)MCH is addressable as a master device. This allows an
external TV encoder device to drive a pixel clock signal on SDVO_TVCLKIN[+/-] that
the (G)MCH uses as a reference frequency. The frequency of this clock is dependent on
the output resolution required.
Flicker Filter and Overscan Compensation
The overscan compensation scaling and the flicker filter is done in the external TV
encoder chip. Care must be taken to allow for support of TV sets with high performance
de-interlacers and progressive scan displays connected to by way of a non-interlaced
signal. Timing will be generated with pixel granularity to allow more overscan ratios to
be supported.
When source material is in the YUV format and is destined for a device that can take
YUV format data in, it is desired to send the data without converting it to RGB. This
avoids the truncation errors associated with multiple color conversion steps. The
common situation will be that the overlay source data is in the YUV format and will
bypass the conversion to RBG as it is sent to the TV port directly.
Analog content protection may be provided through the external encoder.
Connectors
Target TV connector support includes the CVBS, S-Video, Analog Component (Y Pb Pr),
and SCART connectors. The external TV encoder will determine the method of support.
SDVO DVI
SDVO TV-Out
381
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