QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 269

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

PCI Express Graphics Device 1 Configuration Registers (D1:F0)
7.2.10
Datasheet
LE1D - Link Entry 1 Description
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
First part of a Link Entry which declares an internal link to another Root Complex
Element.
31:24
23:16
15:2
Bit
1
0
Access
R/WO
R/WO
RO
RO
RO
Default
0000h
Value
00h
00h
0b
0b
Target Port Number (TPN):
Specifies the port number associated with the element targeted
by this link entry (Egress Port). The target port number is with
respect to the component that contains this element as specified
by the target component ID.
Target Component ID (TCID):
Identifies the physical or logical component that is targeted by
this link entry.
BIOS Requirement: Must be initialized according to guidelines
in the PCI Express Isochronous/Virtual Channel Support
Hardware Programming Specification (HPS).
Reserved
Link Type (LTYP):
Indicates that the link points to memory-mapped space (for
RCRB). The link address specifies the 64-bit base address of the
target RCRB.
Link Valid (LV):
0: Link Entry is not valid and will be ignored.
1: Link Entry specifies a valid link.
0/1/0/MMR
150-153h
00000000h
R/WO; RO
32 bits
Description
269