QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 8

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

7
8
6.5
6.6
6.7
PCI Express Graphics Device 1 Configuration Registers (D1:F0) ............................ 225
7.1
6.4.24 EXTTSCS - External Thermal Sensor Control and Status ............................. 191
6.4.25 DFT_STRAP1 – DFT Register .................................................................. 192
Device 0 MCHBAR ACPI Power Management Controls............................................ 193
6.5.1
6.5.2
6.5.3
6.5.4
6.5.5
6.5.6
6.5.7
6.5.8
6.5.9
6.5.10 GIPMC1 - Graphics Interface Power Management Control 1 ........................ 197
6.5.11 FSBPMC1 - Front Side Bus Power Management Control 1............................ 197
6.5.12 UPMC3 Unit Power Management Control 3................................................ 198
6.5.13 ECO - ECO Bits ..................................................................................... 198
DMI RCRB....................................................................................................... 199
6.6.1
6.6.2
6.6.3
6.6.4
6.6.5
6.6.6
6.6.7
6.6.8
6.6.9
6.6.10 DMIVC1RSTS - DMI VC1 Resource Status................................................. 207
6.6.11 DMILE2A - DMI Link Entry 2 Address ....................................................... 208
6.6.12 DMILCAP - DMI Link Capabilities ............................................................. 208
6.6.13 DMILCTL - DMI Link Control ................................................................... 209
6.6.14 DMILSTS - DMI Link Status .................................................................... 210
6.6.15 DMICTL1 – DMI Control 1 ...................................................................... 210
6.6.16 DMICTL2– DMI Control 2 ....................................................................... 211
6.6.17 DMIDRCCFG - DMI DRC Configuration ..................................................... 211
Egress Port (EP) RCRB...................................................................................... 211
6.7.1
6.7.2
6.7.3
6.7.4
6.7.5
6.7.6
6.7.7
6.7.8
6.7.9
6.7.10 EPVC1MTS - EP VC 1 Maximum Number of Time Slots ............................... 219
6.7.11 EPVC1IST - EP VC 1 Isoch Slot Time........................................................ 219
6.7.12 EPESD - EP Element Self Description ....................................................... 220
6.7.13 EPLE1D - EP Link Entry 1 Description....................................................... 221
6.7.14 EPLE1A - EP Link Entry 1 Address ........................................................... 222
6.7.15 EPLE2D - EP Link Entry 2 Description....................................................... 223
6.7.16 EPLE2A - EP Link Entry 2 Address ........................................................... 224
6.7.17 PORTARB - Port Arbitration Table ............................................................ 224
PEG Device 1 Function 0 Configuration Register Summary..................................... 225
Power Management Mode Support Options ............................................... 193
C2C3TT - C2 to C3 Transition Timer ........................................................ 194
C3C4TT - C3 to C4 Transition Timer ........................................................ 194
MIPMC4 - Memory Interface Power Management Control 4 ......................... 195
MIPMC5 - Memory Interface Power Management Control 5 ......................... 195
MIPMC6 - Memory Interface Power Management Control 6 ......................... 195
MIPMC7 - Memory Interface Power Management Control 7 ......................... 195
PMCFG - Power Management Configuration .............................................. 196
SLFRCS - Self-Refresh Channel Status ..................................................... 197
DMIVCECH - DMI Virtual Channel Enhanced Capability ............................... 200
DMIPVCCAP1 - DMI Port VC Capability Register 1 ...................................... 201
DMIPVCCAP2 - DMI Port VC Capability Register 2 ...................................... 201
DMIPVCCTL - DMI Port VC Control........................................................... 202
DMIVC0RCAP - DMI VC0 Resource Capability ............................................ 202
DMIVC0RCTL0 - DMI VC0 Resource Control .............................................. 203
DMIVC0RSTS - DMI VC0 Resource Status................................................. 204
DMIVC1RCAP - DMI VC1 Resource Capability ............................................ 205
DMIVC1RCTL1 - DMI VC1 Resource Control .............................................. 206
EP Register Summary............................................................................ 211
EPPVCCAP1 - EP Port VC Capability Register 1 .......................................... 214
EPPVCCAP2 - EP Port VC Capability Register 2 .......................................... 214
EPVC0RCAP - EP VC 0 Resource Capability ............................................... 215
EPVC0RCTL - EP VC 0 Resource Control ................................................... 216
EPVC0RSTS - EP VC 0 Resource Status .................................................... 216
EPVC1RCAP - EP VC 1 Resource Capability ............................................... 217
EPVC1RCTL - EP VC 1 Resource Control ................................................... 218
EPVC1RSTS - EP VC 1 Resource Status .................................................... 219
Datasheet