QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 174

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QG82945GSE S LB2R

Manufacturer Part Number
QG82945GSE S LB2R
Description
GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
Manufacturer
Intel
Datasheet
6.4.6
174
THERM1-1 - Hardware Throttle Control 1-1
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
7:7
6:5
4:4
3:3
2:2
1:1
0:0
Bit
Access
R/W/L
R/W/L
R/W/L
R/W/L
R/W/L
R/WO
RO
Default
Value
00b
0b
0b
0b
0b
0b
0b
Internal Thermal Hardware Throttling Enable Bit
(ITHTE):
This bit is a master enable for internal thermal sensor-based
hardware throttling
0 Hardware actions via the internal thermal sensor are
disabled.
1 Hardware actions via the internal thermal sensor are
enabled.
Reserved
This bit determines what temperature zones will enable
automatic throttling. This register applies to internal thermal
sensor throttling. Lockable by bit0 of this register.
See also the throttling registers in PCI configuration space
Device 0 which is used to enable or disable throttling
0 = Reserved
1 = Hot and Catastrophic.
Halt on Catastrophic (HOC):
When this bit is set, THRMTRIP# is asserted on catastrophic
trip to bring the platform down. A system reboot is required to
bring the system out of a halt from the thermal sensor. Once
the Catastrophic trip point is reached, THRMTRIP# will stay
asserted even if the catastrophic trip deasserts before the
platform is shut down.
Reserved
Reserved
Reserved
Throttling Zone Selection (TZS):
0/0/0/MCHBAR
C94h
00h
R/W/L; ROR/WO
8 bits
Description
Device 0 Memory Mapped I/O Register
Datasheet

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