QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 201

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

Device 0 Memory Mapped I/O Register
6.6.2
6.6.3
Datasheet
DMIPVCCAP1 - DMI Port VC Capability Register 1
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register describes the configuration of PCI Express Virtual Channels associated
with this port.
DMIPVCCAP2 - DMI Port VC Capability Register 2
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register describes the configuration of PCI Express Virtual Channels associated
with this port.
31:24
31:7
23:8
6:4
3:3
2:0
7:0
Bit
Bit
Access
Access
R/WO
RO
RO
RO
RO
RO
RO
0000000
Default
Default
Value
Value
0000h
000b
001b
00h
01h
0b
h
Reserved
Low Priority Extended VC Count (LPEVCC):
Indicates the number of (extended) Virtual Channels in addition
to the default VC belonging to the low-priority VC (LPVC) group
that has the lowest priority with respect to other VC resources
in a strict-priority VC Arbitration.
The value of 0 in this field implies strict VC arbitration.
Reserved
Extended VC Count (EVCC):
Indicates the number of (extended) Virtual Channels in addition
to the default VC supported by the device.
The Private Virtual Channel is not included in this count.
Reserved
Reserved
VC Arbitration Capability (VCAC):
Indicates that the only possible VC arbitration scheme is
hardware fixed (in the root complex). VC1 is the highest
priority and VC0 is the lowest priority.
0/0/0/DMIBAR
4-7h
00000001h
R/WO; RO
32 bits
0/0/0/DMIBAR
8-Bh
00000001h
RO
32 bits
Description
Description
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