QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 253

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

PCI Express Graphics Device 1 Configuration Registers (D1:F0)
7.1.35
Datasheet
DSTS - Device Status
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register reflects status corresponding to controls in the Device Control register.
The error reporting bits are in reference to errors detected by this device, not errors
messages received across the link.
15:6
Bit
5
4
3
2
1
0
Access
R/WC
R/WC
R/WC
R/WC
RO
RO
RO
Default
Value
000h
0b
0b
0b
0b
0b
0b
Reserved
Transactions Pending (TP):
outstanding non-posted requests on any used Virtual Channel)
have been completed.
(including completions for any outstanding non-posted requests
for all used Traffic Classes).
Reserved
Unsupported Request Detected (URD):
When set this bit indicates that the Device received an
Unsupported Request. Errors are logged in this register
regardless of whether error reporting is enabled or not in the
Device Control register.
Additionally, the Non-Fatal Error Detected bit or the Fatal Error
Detected bit is set according to the setting of the Unsupported
Request Error Severity bit. In production systems setting the
Fatal Error Detected bit is not an option as support for AER will
not be reported.
Fatal Error Detected (FED):
When set this bit indicates that fatal error(s) were detected.
Errors are logged in this register regardless of whether error
reporting is enabled or not in the Device Control register. When
Advanced Error Handling is enabled, errors are logged in this
register regardless of the settings of the uncorrectable error mask
register.
Non-Fatal Error Detected (NFED):
When set this bit indicates that non-fatal error(s) were detected.
Errors are logged in this register regardless of whether error
reporting is enabled or not in the Device Control register.
When Advanced Error Handling is enabled, errors are logged in
this register regardless of the settings of the uncorrectable error
mask register.
Correctable Error Detected (CED):
When set this bit indicates that correctable error(s) were
detected. Errors are logged in this register regardless of whether
error reporting is enabled or not in the Device Control register.
this register regardless of the settings of the correctable error
mask register.
When Advanced Error Handling is enabled, errors are logged in
0: All pending transactions (including completions for any
1: Indicates that the device has transaction(s) pending
0/1/0/PCI
AA-ABh
0000h
R/WC; RO
16 bits
Description
253