AT91RM9200-QI-002 Atmel, AT91RM9200-QI-002 Datasheet - Page 672

• Manufacturer Part Number: AT91RM9200-QI-002
• Description: IC ARM9 MCU 208 PQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91RM9200-QI-002

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: POR
• Number Of I /o: 122
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-MQFP, 208-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

41.2
41.2.1
41.3
41.3.1
41.4
41.4.1
41.4.2
41.4.3
672
EBI
EMAC
MCI
AT91RM9200
A24 not wired internally between the EBI and the PIO
Using Receive frames and buffers not word-aligned
Data Endianess inversion from the MCI to MMC or SD Card
Data Timeout Error Flag
STREAM command not supported
A24 is not wired internally between the EBI and the PIO. Use only PIO mode on it.
Problem Fix/Workaround
Due to this error, static memories over 16M bytes per chip select cannot be used. To interface
32-Mbyte memories and over, the user must use two memory chips connected on two different
chip selects.
A dead lock may appear when the Ethernet MAC attempts to store a new received valid frame
while there are no more rx buffer descriptors. This appears only when the received frame length
is not a multiple of 4 bytes. In this configuration, even if the application enables new receive buf-
fer descriptors, all packets will be rejected.
Problem Fix/Workaround
The software workaround is to disable and re-enable the receive function in the network function
register ETH_CTL each time a buffer is not available (RBNA in the status register).
Note that an interrupt can be activated for the RBNA detection.
Another workaround is to align the address of the receive buffer descriptor on a boundary of 16
Words (address 0xaaaa aa00, 0xaaaa aa40, 0xaaaa aa80,.....)
The data endianess is inverted when writing or reading to or from an MMC or SD card. If the MCI
interface is exclusively used to read/write from/to a dedicated card the inversion is not visible
(two inversions). Furthermore, if the card is shared with other systems then endianess will not
match. This endianess inversion concerns only data sectors and not command and response.
Problem Fix/Workaround
A software workaround consists of swapping the order of word bytes before writing and after
reading.
As the data timeout error flag cannot rise, the MCI is stalled indefinitely waiting for the data start
bit.
Problem Fix/Workaround
A STOP command must be sent with a software timeout.
The STREAM READ/WRITE commands are not supported by the MCI.
ETH CTL &= ~0x00000004 ;
ETH CTL |=
0x00000004 ;
1768I–ATARM–09-Jul-09