AT91RM9200-QI-002 Atmel, AT91RM9200-QI-002 Datasheet - Page 267

• Manufacturer Part Number: AT91RM9200-QI-002
• Description: IC ARM9 MCU 208 PQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91RM9200-QI-002

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: POR
• Number Of I /o: 122
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-MQFP, 208-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

23.4.5.4
23.4.5.5
1768I–ATARM–09-Jul-09
Main Clock Frequency Counter
Main Oscillator Bypass
The software enables or disables the Main Oscillator so as to reduce power consumption by
clearing the MOSCEN bit in the Main Oscillator Register (CKGR_MOR). When disabling the
Main Oscillator by clearing the MOSCEN bit in CKGR_MOR, the MOSCS bit in PMC_SR is
automatically cleared indicating the Main Clock is off.
When enabling the Main Oscillator, the user must initiate the Main Oscillator counter with a value
corresponding to the startup time of the oscillator. This startup time depends on the crystal fre-
quency connected to the main oscillator. When the MOSCEN bit and the OSCOUNT are written
in CKGR_MOR to enable the Main Oscillator, the MOSCS bit is cleared and the counter starts
counting down on Slow Clock from the OSCOUNT value. Since the OSCOUNT value is coded
with 8 bits, the maximum startup time is about 62 ms.
When the counter reaches 0, the MOSCS bit is set, indicating that the Main Clock is valid. Set-
ting the MOSCS bit in PMC_IMR can trigger an interrupt to the processor on this event.
The Main Oscillator features a Main Clock frequency counter that provides the quartz frequency
connected to the Main Oscillator. Generally, this value is known by the system designer; how-
ever, it is useful for the boot program to configure the device with the correct clock speed,
independently of the application.
The Main Clock frequency counter starts incrementing at the Main Clock speed after the next ris-
ing edge of the Slow Clock as soon as the Main Oscillator is stable, i.e., as soon as the MOSCS
bit is set. Then, at the 16th falling edge of Slow Clock, the bit MAINRDY in CKGR_MCFR (Main
Clock Frequency Register) is set and the counter stops counting. Its value can be read in the
MAINF field of CKGR_MCFR and gives the number of Main Clock cycles during 16 periods of
Slow Clock, so that the frequency of the crystal connected on the Main Oscillator can be
determined.
The user can input a clock on the device instead of connecting a crystal. In this case, the user
has to provide the external clock signal on the pin XIN. The input characteristics of the XIN pin
under these conditions are given in the product Electrical Characteristics section. The program-
mer has to be sure not to modify the MOSCEN bit in the Main Oscillator Register (CKGR_MOR).
This bit must remain at 0, its reset value, for the external clock to operate properly. While this bit
is at 0, the pin XIN is pulled down by a 500 kΩ resistor in parallel with a 40 pF capacitor.
The external clock signal must meet the requirements relating to the power supply VDDPLL (i.e.,
between 1.65V and 1.95V) and cannot exceed 50 MHz.
AT91RM9200
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