AT91RM9200-QI-002 Atmel, AT91RM9200-QI-002 Datasheet - Page 588

IC ARM9 MCU 208 PQFP

AT91RM9200-QI-002

Manufacturer Part Number
AT91RM9200-QI-002
Description
IC ARM9 MCU 208 PQFP
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91RM9200-QI-002

Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91RM9200-QI-002
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT91RM9200-QI-002 SL383
Manufacturer:
Atmel
Quantity:
10 000
34.6.10
Register Name:
Access Type:
WARNING: Due to a synchronization between MCK and UDPCK, the software application must wait for the end of the write
operation before executing another write by polling the bits which must be set/cleared.
//! Clear flags of UDP UDP_CSR register and waits for synchronization
#define Udp_ep_clr_flag(pInterface, endpoint, flags) { \
pInterface->UDP_CSR[endpoint] &= ~(flags); \
while ( (pInterface->UDP_CSR[endpoint] & (flags)) == (flags) ); \
}
//! Set flags of UDP UDP_CSR register and waits for synchronization
#define Udp_ep_set_flag(pInterface, endpoint, flags) { \
pInterface->UDP_CSR[endpoint] |= (flags); \
while ( (pInterface->UDP_CSR[endpoint] & (flags)) != (flags) ); \
}
• TXCOMP: Generates an IN packet with data previously written in the DPR
This flag generates an interrupt while it is set to one.
Write (Cleared by the firmware)
0 = Clear the flag, clear the interrupt.
1 = No effect.
Read (Set by the USB peripheral)
0 = Data IN transaction has not been acknowledged by the Host.
1 = Data IN transaction is achieved, acknowledged by the Host.
After having issued a Data IN transaction setting TXPKTRDY, the device firmware waits for TXCOMP to be sure that the
host has acknowledged the transaction.
588
EPEDS
DIR
31
23
15
7
AT91RM9200
UDP Endpoint Control and Status Register
RX_DATA_
BK1
30
22
14
UDP_CSRx [x = 0. 7]
Read/Write
6
FORCE
STALL
29
21
13
5
TXPKTRDY
28
20
12
4
RXBYTECNT
STALLSENT
ISOERROR
DTGLE
27
19
11
3
RXSETUP
26
18
10
2
RXBYTECNT
RX_DATA_
EPTYPE
BK0
25
17
9
1
1768I–ATARM–09-Jul-09
TXCOMP
24
16
8
0

Related parts for AT91RM9200-QI-002