AT91RM9200-QI-002 Atmel, AT91RM9200-QI-002 Datasheet - Page 405
AT91RM9200-QI-002
Manufacturer Part Number
AT91RM9200-QI-002
Description
IC ARM9 MCU 208 PQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets
1.AT91RM9200-EK.pdf
(41 pages)
2.AT91RM9200-DK.pdf
(2 pages)
3.AT91RM9200-QU-002.pdf
(701 pages)
Specifications of AT91RM9200-QI-002
Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91RM9200-QI-002 SL383
Manufacturer:
Atmel
Quantity:
10 000
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29.6.3
Register Name:
Access Type:
• IADR: Internal Address
0, 1, 2 or 3 bytes depending on IADRSZ. Low significant byte address in 10-bit mode addresses.
29.6.4
Register Name:
Access Type:
• CLDIV: Clock Low Divider
The TWCK low period is defined as follows:
• CHDIV: Clock High Divider
The TWCK high period is defined as follows:
• CKDIV: Clock Divider
The CKDIV is used to increase both TWCK high and low periods.
1768I–ATARM–09-Jul-09
T
T
31
23
15
31
23
15
–
7
–
–
7
low
high
TWI Internal Address Register
TWI Clock Waveform Generator Register
=
=
(
(
(
(
CLDIV
CHDIV
×
30
22
14
30
22
14
×
TWI_IADR
Read/Write
–
6
TWI_CWGR
Read/Write
–
–
6
2
2
CKDIV
CKDIV
)
)
+
+
3 )
3 )
×
×
T
29
21
13
29
21
13
–
5
–
–
5
T
MCK
MCK
28
20
12
28
20
12
–
4
–
–
4
CHDIV
CLDIV
IADR
IADR
IADR
27
19
11
27
19
11
–
3
–
–
3
26
18
10
26
18
10
–
2
–
2
CKDIV
AT91RM9200
25
17
25
17
–
9
1
–
9
1
24
16
24
16
–
8
0
–
8
0
405
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