AT91RM9200-QI-002 Atmel, AT91RM9200-QI-002 Datasheet - Page 306
AT91RM9200-QI-002
Manufacturer Part Number
AT91RM9200-QI-002
Description
IC ARM9 MCU 208 PQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets
1.AT91RM9200-EK.pdf
(41 pages)
2.AT91RM9200-DK.pdf
(2 pages)
3.AT91RM9200-QU-002.pdf
(701 pages)
Specifications of AT91RM9200-QI-002
Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91RM9200-QI-002 SL383
Manufacturer:
Atmel
Quantity:
10 000
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25.4
25.4.1
25.4.2
25.4.3
25.4.4
306
Functional Description
AT91RM9200
Reference Clock
Timing
Alarm
Error Checking
Real Time Clock, Power Management Controller, Memory Controller, etc.). When a system
interrupt occurs, the service routine must first determine the cause of the interrupt. This is done
by reading the status registers of the above system peripherals successively.
The RTC provides a full binary-coded decimal (BCD) clock that includes century (19/20), year
(with leap years), month, date, day, hours, minutes and seconds.
The valid year range is 1900 to 2099, a two-hundred-year Gregorian calendar achieving full Y2K
compliance.
The RTC can operate in 24-hour mode or in 12-hour mode with an AM/PM indicator.
Corrections for leap years are included (all years divisible by 4 being leap years, including year
2000). This is correct up to the year 2099.
After hardware reset, the calendar is initialized to Thursday, January 1, 1998.
The reference clock is Slow Clock (SLCK). It can be driven by the Atmel cell OSC55 or OSC56
(or an equivalent cell) and an external 32.768 kHz crystal.
During low power modes of the processor (idle mode), the oscillator runs and power consump-
tion is critical. The crystal selection has to take into account the current consumption for power
saving and the frequency drift due to temperature effect on the circuit for time accuracy.
The RTC is updated in real time at one-second intervals in normal mode for the counters of sec-
onds, at one-minute intervals for the counter of minutes and so on.
Due to the asynchronous operation of the RTC with respect to the rest of the chip, to be certain
that the value read in the RTC registers (century, year, month, date, day, hours, minutes, sec-
onds) are valid and stable, it is necessary to read these registers twice. If the data is the same
both times, then it is valid. Therefore, a minimum of two and a maximum of three accesses are
required.
The RTC has five programmable fields: month, date, hours, minutes and seconds.
Each of these fields can be enabled or disabled to match the alarm condition:
Depending on the combination of fields enabled, a large number of possibilities are available to
the user ranging from minutes to 365/366 days.
Verification on user interface data is performed when accessing the century, year, month, date,
day, hours, minutes, seconds and alarms. A check is performed on illegal BCD entries such as
illegal date of the month with regard to the year and century configured.
If one of the time fields is not correct, the data is not loaded into the register/counter and a flag is
set in the validity register. The user can not reset this flag. It is reset as soon as an acceptable
• If all the fields are enabled, an alarm flag is generated (the corresponding flag is asserted
• If only the “seconds” field is enabled, then an alarm is generated every minute.
and an interrupt generated if enabled) at a given month, date, hour/minute/second.
1768I–ATARM–09-Jul-09
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