AT91RM9200-QI-002 Atmel, AT91RM9200-QI-002 Datasheet - Page 273

• Manufacturer Part Number: AT91RM9200-QI-002
• Description: IC ARM9 MCU 208 PQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91RM9200-QI-002

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: POR
• Number Of I /o: 122
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-MQFP, 208-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

23.5
23.5.1
Table 23-1.
23.5.2
Figure 23-9. Switch Master Clock from Slow Clock to PLLA Clock
1768I–ATARM–09-Jul-09
To
Main Clock
SLCK
PLLA Clock
PLLB Clock
Clock Switching Details
Master Clock Switching Timings
Clock Switching Waveforms
Clock Switching Timings (Worst Case)
From
Write PMC_MCKR
Master Clock
PLLACOUNT x SLCK +
PLLBCOUNT x SLCK +
PLLA Clock
Table 23-1
clock to another one. This is in the event that the prescaler is de-activated. When the prescaler
is activated, an additional time of 64 clock cycles of the new selected clock has to be added.
Slow Clock
MCKRDY
0.5 x Main Clock +
0.5 x Main Clock +
0.5 x Main Clock +
2.5 x PLLA Clock
2.5 x PLLB Clock
LOCK A
Main Clock
4 x SLCK +
4 x SLCK +
4.5 x SLCK
–
gives the worst case timing required for the Master Clock to switch from one selected
PLLACOUNT x SLCK
PLLBCOUNT x SLCK
2.5 x PLLA Clock +
2.5 x PLLB Clock +
2.5 x Main Clock
4 x SLCK +
5 x SLCK +
5 x SLCK +
SLCK
–
PLLB COUNT x SLCK
2.5 x PLLA Clock +
3 x PLLA Clock +
3 x PLLA Clock +
3 x PLLB Clock +
1.5 x PLLB Clock
1 x Main Clock
PLLA Clock
4 x SLCK +
4 x SLCK +
4 x SLCK +
5 x SLCK
AT91RM9200
PLLACOUNT x SLCK
2.5 x PLLB Clock +
3 x PLLB Clock +
3 x PLLB Clock +
3 x PLLA Clock +
1.5 x PLLA Clock
1 x Main Clock
PLLB Clock
4 x SLCK +
4 x SLCK +
4 x SLCK +
5 x SLCK
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