AT91RM9200-QI-002 Atmel, AT91RM9200-QI-002 Datasheet - Page 52

• Manufacturer Part Number: AT91RM9200-QI-002
• Description: IC ARM9 MCU 208 PQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91RM9200-QI-002

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: POR
• Number Of I /o: 122
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-MQFP, 208-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

11.7.7
Access: Read/Write
The CP 15 Register 6, or Fault Address Register (FAR), contains the MVA (Modified Virtual Address) of the access being
attempted when the last fault occurred. The FAR is only updated for data faults, not for prefetch faults.
The ability to write to the FAR is provided to allow a debugger to restore a previous state.
• FAR[31:0]: Fault Address
On reading: returns the value of the FAR. The FAR holds the virtual address of the access which was attempted when fault
occurred.
On writing: sets the FAR to the value of the written data. This is useful for a debugger to restore the value of the FAR.
11.7.8
Access: Write-only
The CP15 Register 7, or Cache Operation Register, is used to manage the Instruction Cache (ICache) and the Data Cache
(DCache).
The function of each cache operation is selected by the opcode_2 and CRm fields in the MCR instruction used to write
CP15 Register 7.
Table 11-6.
52
Function
Wait for Interrupt
Invalidate ICache
Invalidate ICache single entry (using MVA)
Invalidate DCache
Invalidate DCache single entry (using MVA)
Invalidate ICache and DCache
Clean DCache singe entry (using MVA)
Clean DCache single entry (using index)
Drain write buffer
Prefetch ICache line (using MVA)
Clean and Invalidate DCache entry (using MVA)
Clean and Invalidate DCache entry (using index)
31
23
15
7
AT91RM9200
CP15 Register 6, Fault Address Register
CP15 Register 7, Cache Operation Register
Cache Functions
30
22
14
6
29
21
13
5
28
20
12
4
FAR
FAR
FAR
FAR
Data
SBZ
SBZ
MVA format
SBZ
MVA format
SBZ
MVA format
Index format
SBZ
MVA format
MVA format
Index format
27
19
11
3
26
18
10
2
CRm
c10
c10
c10
c13
c14
c14
c0
c5
c5
c6
c6
c7
25
17
9
1
1768I–ATARM–09-Jul-09
opcode_2
4
0
1
0
1
0
1
2
4
1
1
2
24
16
8
0
D