AT91RM9200-QI-002 Atmel, AT91RM9200-QI-002 Datasheet - Page 227
AT91RM9200-QI-002
Manufacturer Part Number
AT91RM9200-QI-002
Description
IC ARM9 MCU 208 PQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets
1.AT91RM9200-EK.pdf
(41 pages)
2.AT91RM9200-DK.pdf
(2 pages)
3.AT91RM9200-QU-002.pdf
(701 pages)
Specifications of AT91RM9200-QI-002
Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91RM9200-QI-002 SL383
Manufacturer:
Atmel
Quantity:
10 000
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- Download datasheet (10Mb)
20.7
20.7.1
Register Name:
Access Type:
Reset Value
• BFCOM: Burst Flash Controller Operating Mode
• BFCC: Burst Flash Controller Clock
• AVL: Address Valid Latency
The Address Valid Latency is defined as the number of BFC Clock Cycles from the first BFCK rising edge when BFAVD is
asserted to the BFCK rising edge that samples read data. The Latency is equal to AVL + 1.
1768I–ATARM–09-Jul-09
31
23
15
–
–
–
7
Burst Flash Controller (BFC) User Interface
Burst Flash Controller Mode Register
0
0
1
1
0
0
1
1
30
22
14
BFC_MR
Read/Write
:0x0
–
–
–
6
BFCOM
BFCC
AVL
29
21
13
–
–
5
0
1
0
1
0
1
0
1
OEL
28
20
12
–
–
4
BFC Operating Mode
Disabled.
Asynchronous
Burst Read
Reserved
BFC Clock
Reserved
Master Clock
Master Clock divided by 2
Master Clock divided by 4
RDYEN
27
19
11
–
3
BFCC
MUXEN
26
18
10
–
2
BFOEH
PAGES
AT91RM9200
25
17
–
9
1
BFCOM
BAAEN
24
16
–
8
0
227
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