AT91RM9200-QI-002 Atmel, AT91RM9200-QI-002 Datasheet - Page 197

• Manufacturer Part Number: AT91RM9200-QI-002
• Description: IC ARM9 MCU 208 PQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91RM9200-QI-002

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: POR
• Number Of I /o: 122
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-MQFP, 208-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

19.5
19.5.1
Figure 19-2. SDRAM Device Initialization Sequence
19.5.2
1768I–ATARM–09-Jul-09
A[12:11]
SDCKE
SDWE
SDCK
SDCS
A[9:0]
RAS
CAS
NBS
A10
Product Dependencies
Inputs Stable for
SDRAM Device Initialization
I/O Lines
200 μsec
The initialization sequence is generated by software. The SDRAM devices are initialized by the
following sequence:
After these six steps, the SDRAM devices are fully functional.
The commands (NOP, MRS, CBR, normal mode) are generated by programming the command
field in the SDRAMC Mode register
Precharge All Banks 1st Auto-refresh
The pins used for interfacing the SDRAM Controller may be multiplexed with the PIO lines. The
programmer must first program the PIO controller to assign the SDRAM Controller pins to their
peripheral function. If I/O lines of the SDRAM Controller are not used by the application, they
can be used for other purposes by the PIO Controller.
1. A minimum pause of 200 µs is provided to precede any signal toggle.
2. An All Banks Precharge command is issued to the SDRAM devices.
3. Eight auto-refresh (CBR) cycles are provided.
4. A mode register set (MRS) cycle is issued to program the parameters of the SDRAM
5. A Normal Mode command is provided, 3 clocks after t
6. Write refresh rate into the count field in the SDRAMC Refresh Timer register. (Refresh
devices, in particular CAS latency and burst length.
rate = delay between refresh cycles).
t
RP
8th Auto-refresh
t
RC
MRD
MRS Command
is met.
AT91RM9200
t
MRD
Valid Command
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