HD6432621 Hitachi, HD6432621 Datasheet - Page 756
HD6432621
Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
1.HD6432621.pdf
(1069 pages)
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Bit 7
DTON
0
1
Note: * Always set high-speed mode when shifting to watch mode or sub-active mode.
Bit 6—Low-Speed ON Flag (LSON): When shifting to low power dissipation mode by executing
the SLEEP instruction, this bit specifies the operating mode, in combination with other control
bits. This bit also controls whether to shift to high-speed mode or sub-active mode when watch
mode is cancelled.
Bit 6
LSON
0
1
Note: * Always set high-speed mode when shifting to watch mode or sub-active mode.
712
Description
Description
When the SLEEP instruction is executed in high-speed mode or medium-speed
mode, operation shifts to sleep mode, software standby mode, or watch mode*.
When the SLEEP instruction is executed in sub-active mode, operation shifts
to sub-sleep mode or watch mode.
When the SLEEP instruction is executed in high-speed mode or medium-speed
mode, operation shifts directly to sub-active mode*, or shifts to sleep mode or
software standby mode.
When the SLEEP instruction is executed in sub-active mode, operation shifts directly
to high-speed mode, or shifts to sub-sleep mode.
When the SLEEP instruction is executed in high-speed mode or medium-speed
mode, operation shifts to sleep mode, software standby mode, or watch mode*.
When the SLEEP instruction is executed in sub-active mode, operation shifts to
watch mode or shifts directly to high-speed mode.
Operation shifts to high-speed mode when watch mode is cancelled.
When the SLEEP instruction is executed in high-speed mode, operation shifts to
watch mode or sub-active mode.
When the SLEEP instruction is executed in sub-active mode, operation shifts to sub-
sleep mode or watch mode.
Operation shifts to sub-active mode when watch mode is cancelled.
(Initial value)
(Initial value)
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