HD6432621 Hitachi, HD6432621 Datasheet - Page 19
HD6432621
Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
1.HD6432621.pdf
(1069 pages)
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Section
21B.6.3 Setting
Oscillation Stabilization
Time after Clearing
Software Standby Mode
Table 21B-5
Oscillation Stabilization
Time Settings
Using an External Clock
21B.13 Usage Notes
Page
720
728
Description
Note amended
Note: * Do not use this setting.
Newly added
Using an External Clock: It is necessary to allow time for the PLL circuit to
stabilize. Therefore, the standby time should be set to a value of 2 ms or
greater.
Newly added
21B.13 Usage Notes
1. When making a transition to sub-active mode or watch mode, set the
2. The on-chip peripheral modules (DTC and TPU) which halt operation in
STS2 STS1 STS0 Standby Time
0
1
DTC to enter module stop mode (write 1 to the relevant bits in MSTPCR),
and then read the relevant bits to confirm that they are set to 1 before
mode transition. Do not clear module stop mode (write 0 to the relevant
bits in MSTPCR) until a transition from sub-active mode to high-speed
mode or medium-speed mode has been performed.
If a DTC activation source occurs in sub-active mode, the DTC will be
activated only after module stop mode has been cleared and high-speed
mode or medium-speed mode has been entered.
sub-active mode cannot clear an interrupt in sub-active mode. Therefore,
if a transition is made to sub-active mode while an interrupt is requested,
the CPU interrupt source cannot be cleared. Disable the interrupts of
each on-chip peripheral module before executing a SLEEP instruction to
enter sub-active mode or watch mode.
0
1
0
1
0
1
0
1
0
1
0
1
8192 states
16384 states
32768 states
65536 states
131072 states
262144 states
Reserved
16 states*
20
MHz
0.41 0.51 0.68 0.8
0.82 1.0
1.6
3.3
6.6
—
0.8
13.1 16.4 21.8 26.2 32.8 43.6 65.6
16
MHz
2.0
4.1
—
1.0
8.2
12
MHz
1.3
2.7
5.5
—
1.3
10.9 13.1 16.4 21.8 32.8
10
MHz
1.6
3.3
6.6
—
1.6
8
MHz
1.0
2.0
4.1
—
2.0
8.2
6
MHz
1.3
2.7
5.5
—
1.7
10.9 16.4
4
MHz Unit
2.0
4.1
—
4.0
8.2
ms
µs
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