HD6432621 Hitachi, HD6432621 Datasheet - Page 537

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HD6432621

Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
14.2.2
Note: * Only 0 can be written, for flag clearing.
Bit 4 of SSR has a different function in Smart Card interface mode. Coupled with this, the setting
conditions for bit 2, TEND, are also different.
Bits 7 to 5—Operate in the same way as for the normal SCI. For details, see section 13.2.7, Serial
Status Register (SSR).
Bit 4—Error Signal Status (ERS): In Smart Card interface mode, bit 4 indicates the status of the
error signal sent back from the receiving end in transmission. Framing errors are not detected in
Smart Card interface mode.
Bit 4
ERS
0
1
Note: Clearing the TE bit in SCR to 0 does not affect the ERS flag, which retains its previous
Bit
Initial value :
R/W
state.
Serial Status Register (SSR)
Description
Normal reception, with no error signal
[Clearing conditions]
Error signal sent from receiver indicating detection of parity error
[Setting condition]
When the low level of the error signal is sampled
:
:
Upon reset, and in standby mode or module stop mode
When 0 is written to ERS after reading ERS = 1
R/(W)*
TDRE
7
1
R/(W)*
RDRF
6
0
R/(W)*
ORER
5
0
R/(W)*
ERS
4
0
R/(W)*
PER
3
0
TEND
2
1
R
MPB
1
0
R
(Initial value)
MPBT
R/W
0
0
493

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