HD6432621 Hitachi, HD6432621 Datasheet - Page 445

• Manufacturer Part Number: HD6432621
• Description: (HD64F262x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

12.2
12.2.1
TCNT is an 8-bit readable/writable* up-counter.
When the TME bit is set to 1 in TCSR, TCNT starts counting pulses generated from the internal
clock source selected by bits CKS2 to CKS0 in TCSR. When the count overflows (changes from
H'FF to H'00), either the watchdog timer overflow signal (WDTOVF) or an interval timer
interrupt (WOVI) is generated, depending on the mode selected by the WT/IT bit in TCSR.
TCNT is initialized to H'00 by a reset, in hardware standby mode, or when the TME bit is cleared
to 0. It is not initialized in software standby mode.
Note: * TCNT is write-protected by a password to prevent accidental overwriting. For details see
12.2.2
TCSR0
Note: * Only a 0 can be written, for flag clearing.
TCSR1*
Notes: *1 Cannot be used in the H8S/2623 Series.
Bit
Initial value :
R/W
Bit
Initial value :
R/W
Bit
Initial value :
R/W
section 12.2.5, Notes on Register Access.
*2 Only a 0 can be written, for flag clearing.
1
Register Descriptions
Timer Counter (TCNT)
Timer Control/Status Register (TCSR)
:
:
:
:
:
:
R/(W)*
R/(W)*
OVF
OVF
R/W
7
0
7
0
7
0
2
WT/IT
WT/IT
R/W
R/W
R/W
6
0
6
0
6
0
TME
TME
R/W
R/W
R/W
5
0
5
0
5
0
R/W
PSS
R/W
—
—
4
0
4
1
4
0
RST/NMI
R/W
R/W
—
—
3
0
3
1
3
0
CKS2
CKS2
R/W
R/W
R/W
2
0
2
0
2
0
CKS1
CKS1
R/W
R/W
R/W
1
0
1
0
1
0
CKS0
CKS0
R/W
R/W
R/W
0
0
0
0
0
0
401