HD6432621 Hitachi, HD6432621 Datasheet - Page 598

no-image

HD6432621

Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
15.3
15.3.1
The HCAN can be reset by a hardware reset or software reset.
Hardware Reset (HCAN Module Stop, Reset*, Hardware*/Software Standby): Initialization
is performed by automatic setting of the MCR reset request bit (MCR0) in MCR and the reset state
bit (GSR3) in GSR within the HCAN (hardware reset). At the same time, all internal registers are
initialized. However mailbox contents are retained. A flowchart of this reset is shown in figure
15-4.
Note: * In a reset and in hardware standby mode, the module stop bit is initialized to 1 and the
Software Reset (Write to MCR0): In normal operation initialization is performed by setting the
MCR reset request bit (MCR0) in MCR (Software reset). With this kind of reset, if the CAN
controller is performing a communication operation (transmission or reception), the initialization
state is not entered until the message has been completed. During initialization, the reset state bit
(GSR3) in GSR is set. In this kind of initialization, the error counters (TEC and REC) are
initialized but other registers and RAM (mailboxes) are not. A flowchart of this reset is shown in
figure 15-5.
554
HCAN enters the module stop state.
Operation
Hardware and Software Resets

Related parts for HD6432621