HD6432621 Hitachi, HD6432621 Datasheet - Page 539

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HD6432621

Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
14.2.3
Note: When the smart card interface is used, be sure to make the 1 setting shown for bit 5.
The function of bits 7, 6, 3, and 2 of SMR changes in Smart Card interface mode.
Bit 7—GSM Mode (GM): Sets the smart card interface function to GSM mode.
This bit is cleared to 0 when the normal smart card interface is used. In GSM mode, this bit is set
to 1, the timing of setting of the TEND flag that indicates transmission completion is advanced
and clock output control mode addition is performed. The contents of the clock output control
mode addition are specified by bits 1 and 0 of the serial control register (SCR).
Bit 7
GM
0
1
Note: etu: Elementary time unit (time for transfer of 1 bit)
Bit
Initial value :
R/W
Serial Mode Register (SMR)
Description
Normal smart card interface mode operation
GSM mode smart card interface mode operation
:
:
TEND flag generation 12.5 etu (11.5 etu in block transfer mode) after beginning of
start bit
Clock output ON/OFF control only
TEND flag generation 11.0 etu after beginning of start bit
High/low fixing control possible in addition to clock output ON/OFF control (set by
SCR)
R/W
GM
7
0
BLK
R/W
6
0
R/W
PE
5
0
R/W
O/E
4
0
BCP1
R/W
3
0
BCP0
R/W
2
0
CKS1
R/W
1
0
(Initial value)
CKS0
R/W
0
0
495

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