HD6432621 Hitachi, HD6432621 Datasheet - Page 132

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HD6432621

Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
4.2.3
If an interrupt is accepted after a reset but before the stack pointer (SP) is initialized, the PC and
CCR will not be saved correctly, leading to a program crash. To prevent this, all interrupt requests,
including NMI, are disabled immediately after a reset. Since the first instruction of a program is
always executed immediately after the reset state ends, make sure that this instruction initializes
the stack pointer (example: MOV.L #xx: 32, SP).
4.2.4
After reset release, MSTPCRA to MSTPCRC are initialized to H'3F, H'FF, and H'FF, respectively,
and all modules except the DTC enter module stop mode. Consequently, on-chip supporting
module registers cannot be read or written to. Register reading and writing is enabled when
module stop mode is exited.
88
(1) (3) Reset exception handling vector address (when reset, (1) = H'000000,
(2) (4) Start address (contents of reset exception handling vector address)
(5)
(6)
Interrupts after Reset
State of On-Chip Supporting Modules after Reset Release
ø
RES
Internal
address bus
Internal read
signal
Internal write
signal
Internal data
bus
(3) = H'000002)
Start address ((5) = (2) (4))
First program instruction
Figure 4-3 Reset Sequence (Modes 6 and 7)
(1)
Vector fetch
(2)
High
(4)
(3)
processing
Internal
first program
Prefetch of
instruction
(5)
(6)

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