HD6432621 Hitachi, HD6432621 Datasheet - Page 754

• Manufacturer Part Number: HD6432621
• Description: (HD64F262x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

21B.2.2 System Clock Control Register (SCKCR)
SCKCR is an 8-bit readable/writable register that performs ø clock output control and medium-
speed mode control.
SCKCR is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 7—ø Clock Output Disable (PSTOP): In combination with the DDR of the applicable port,
this bit controls ø output. See section 21B.12, ø Clock Output Disable Function for details.
Bit 7
PSTOP
0
1
Bits 6 to 4—Reserved: These bits are always read as 0 and cannot be modified.
Bit 3—Frequency Multiplication Factor Switching Mode Select (STCS): Selects the operation
when the PLL circuit frequency multiplication factor is changed.
Bit 3
STCS
0
1
710
Bit
Initial value :
R/W
High-Speed Mode,
Medium-Speed Mode, Sleep Mode,
Sub-Active Mode
ø output (initial value)
Fixed high
Description
Specified multiplication factor is valid after transition to software standby mode, watch
mode, or subactive mode
Specified multiplication factor is valid immediately after STC bits are rewritten
:
:
PSTOP
R/W
7
0
—
—
6
0
Sub-Sleep Mode
ø output
Fixed high
—
—
5
0
Description
—
—
4
0
Software Standby
Mode, Watch Mode, Hardware Standby
Direct Transition
Fixed high
Fixed high
STCS
R/W
3
0
SCK2
R/W
2
0
Mode
High impedance
High impedance
SCK1
R/W
1
0
(Initial value)
SCK0
R/W
0
0