HD6432621 Hitachi, HD6432621 Datasheet - Page 696

• Manufacturer Part Number: HD6432621
• Description: (HD64F262x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

Example in which Flash Memory Block Area EB0 is Overlapped
1. Set bits RAMS, RAM2 to RAM0 in RAMER to 1, 0, 0, 0, to overlap part of RAM onto the
2. Real-time programming is performed using the overlapping RAM.
3. After the program data has been confirmed, the RAMS bit is cleared, releasing RAM overlap.
4. The data written in the overlapping RAM is written into the flash memory space (EB0).
Notes: 1. When the RAMS bit is set to 1, program/erase protection is enabled for all blocks
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area (EB0) for which real-time programming is required.
2. A RAM area cannot be erased by execution of software in accordance with the erase
3. Block area EB0 contains the vector table. When performing RAM emulation, the
H'3FFFF
H'00000
H'01000
H'02000
H'03000
H'04000
H'05000
H'06000
H'07000
H'08000
regardless of the value of RAM2 to RAM0 (emulation protection). In this state, setting
the P1 or E1 bit in flash memory control register 1 (FLMCR1), will not cause a
transition to program mode or erase mode. When actually programming or erasing a
flash memory area, the RAMS bit should be cleared to 0.
algorithm while flash memory emulation in RAM is being used.
vector table is needed in the overlap RAM.
Figure 19-15 Example of RAM Overlap Operation
Flash memory
EB8 to EB11
EB0
EB1
EB2
EB3
EB4
EB5
EB6
EB7
This area can be accessed
from both the RAM area
and flash memory area
On-chip RAM
H'FFD000
H'FFDFFF
H'FFEFBF