HD6432621 Hitachi, HD6432621 Datasheet - Page 677

• Manufacturer Part Number: HD6432621
• Description: (HD64F262x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

Note: If a memory cell does not operate normally and cannot be erased, one H'FF byte is
continuously at prescribed bit rate
host to indicate end of adjustment
of H'00 data transmitted by host
transmits one H'00 data byte to
Host confirms normal reception
indication (H'00), and transmits
After bit rate adjustment, LSI
sets value in bit rate register
transmitted as an erase error, and the erase operation and subsequent operations
are halted.
LSI calculates bit rate and
of bit rate adjustment end
Host transfers data (H'00)
LSI measures low period
and execute reset-start
LSI transmits one H'AA
Set pins to boot mode
After receiving H'55,
one H'55 data byte
data byte to host
Start
Figure 19-7 Boot Mode Execution Procedure
Host transmits programming control
program transferred to on-chip RAM
program sequentially in byte units
of programming control program
number of bytes to host as verify
programming control program to
control program to on-chip RAM
if data has already been written,
Transfer received programming
memory data has been erased,
host as verify data (echo-back)
Check flash memory data, and
bytes (N), upper byte followed
Execute programming control
After confirming that all flash
LSI transmits one H'AA data
Host transmits number
LSI transmits received
LSI transmits received
End of transmission
data (echo-back)
erase all blocks
by lower byte
byte to host
n = N?
n = 1
Yes
No
n + 1
n
633