HD6432621 Hitachi, HD6432621 Datasheet - Page 1018

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HD6432621

Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
SCR2—Serial Control Register 2
974
Bit
Initial value
Read/Write
Note: For details of how to clear interrupt requests, see section 13.2.6, Serial Control Register (SCR).
:
:
:
R/W
Transmit interrupt enable
TIE
0 Transmit data empty interrupt (TXI) request disabled
1
7
0
Transmit data empty interrupt (TXI) request enabled
Receive interrupt enable
0 Receive data full interrupt (RXI) request and receive error interrupt (ERI) request disabled
1
Receive data full interrupt (RXI) request and receive error interrupt (ERI) request enabled
R/W
RIE
6
0
Transmit enable
0 Transmission disabled
1
R/W
Transmission enabled
TE
5
0
Receive enable
0 Reception disabled
1
Multiprocessor interrupt enable
Reception enabled
0 Multiprocessor interrupts disabled
1
R/W
Transmit end interrupt enable
RE
[Clearing conditions]
• When the MPIE bit is cleared to 0
• When data with MPB = 1 is received
Multiprocessor interrupts enabled
Receive interrupt (RXI) requests, receive error interrupt (ERI)
requests, and setting of the RDRF, FER, and ORER flags in
SSR are disabled until data with the multiprocessor bit set
to 1 is received
0 Transmit end interrupt (TEI) request disabled
1
4
0
Transmit end interrupt (TEI) request enabled
Clock enable
SCMR
SMIF
H'FF8A
0
1
MPIE
R/W
C/A, GM
SMR
3
0
0
1
CKE1
SCR Setting
0
1
TEIE
R/W
2
0
CKE0
0
1
0
1
0
1
Smart Card Interface
See the SCI specification
Operates as port I/O pin
Outputs clock as SCK
output pin
Operates as SCK output
pin, with output fixed low
Outputs clock as SCK
output pin
Operates as SCK output
pin, with output fixed high
Outputs clock as SCK
output pin
CKE1
R/W
SCK Pin Function
1
0
CKE0
R/W
0
0

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