HD6432621 Hitachi, HD6432621 Datasheet - Page 31

• Manufacturer Part Number: HD6432621
• Description: (HD64F262x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

5.2
5.3
5.4
5.5
5.6
Section 6
6.1
6.2
6.3
5.1.1
5.1.2
5.1.3
5.1.4
Register Descriptions......................................................................................................... 98
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
Interrupt Sources................................................................................................................ 103
5.3.1
5.3.2
5.3.3
Interrupt Operation ............................................................................................................ 108
5.4.1
5.4.2
5.4.3
5.4.4
5.4.5
Usage Notes ....................................................................................................................... 117
5.5.1
5.5.2
5.5.3
5.5.4
DTC Activation by Interrupt ............................................................................................. 119
5.6.1
5.6.2
5.6.3
Overview............................................................................................................................ 123
6.1.1
6.1.2
6.1.3
Register Descriptions......................................................................................................... 125
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
Operation ........................................................................................................................... 129
6.3.1
Features ................................................................................................................ 95
Block Diagram...................................................................................................... 96
Pin Configuration ................................................................................................. 97
Register Configuration ......................................................................................... 97
System Control Register (SYSCR) ...................................................................... 98
Interrupt Priority Registers A to K, M (IPRA to IPRK, IPRM)........................... 99
IRQ Enable Register (IER) .................................................................................. 100
IRQ Sense Control Registers H and L (ISCRH, ISCRL)..................................... 101
IRQ Status Register (ISR) .................................................................................... 102
External Interrupts................................................................................................ 103
Internal Interrupts ................................................................................................. 104
Interrupt Exception Handling Vector Table ......................................................... 104
Interrupt Control Modes and Interrupt Operation ................................................ 108
Interrupt Control Mode 0...................................................................................... 111
Interrupt Control Mode 2...................................................................................... 113
Interrupt Exception Handling Sequence .............................................................. 115
Interrupt Response Times..................................................................................... 116
Contention between Interrupt Generation and Disabling..................................... 117
Instructions that Disable Interrupts ...................................................................... 118
Times when Interrupts are Disabled..................................................................... 118
Interrupts during Execution of EEPMOV Instruction.......................................... 119
Overview .............................................................................................................. 119
Block Diagram...................................................................................................... 119
Operation .............................................................................................................. 120
PC Break Controller (PBC)
Features ................................................................................................................ 123
Block Diagram...................................................................................................... 124
Register Configuration ......................................................................................... 125
Break Address Register A (BARA) ..................................................................... 125
Break Address Register B (BARB)...................................................................... 126
Break Control Register A (BCRA) ...................................................................... 126
Break Control Register B (BCRB) ....................................................................... 128
Module Stop Control Register C (MSTPCRC).................................................... 128
PC Break Interrupt Due to Instruction Fetch........................................................ 129
......................................................................... 123
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