HD6432621 Hitachi, HD6432621 Datasheet - Page 686
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HD6432621
Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
1.HD6432621.pdf
(1069 pages)
- Current page: 686 of 1069
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5. The period for which the P1 bit in FLMCR1 is set (the write pulse width) should be changed
6. The program/program-verify flowchart for the H8S/2626 and H8S/2623 is shown in figure 19-
(D)
0
1
Legend
(D): Source data of bits on which programming is executed
(X): Source data of bits on which reprogramming is executed
642
b. After write pulse application, a verify-read is performed in program-verify mode, and
c. If programming of other bits is incomplete in the 128 bytes, reprogramming processing
according to the degree of progress through the program/program-verify procedure. For
detailed wait time specifications, see section 22.6, Flash Memory Characteristics.
11.
To cover the points noted above, bits on which reprogramming processing is to be executed,
and bits on which additional programming is to be executed, must be determined as shown
below.
Since reprogram data and additional-programming data vary according to the progress of the
programming procedure, it is recommended that the following data storage areas (128 bytes
each) be provided in RAM.
Reprogram Data Computation Table
programming is judged to have been completed for bits read as 0.
should be executed. If a bit for which programming has been judged to be completed is
read as 1 in a subsequent verify-read, a write pulse should again be applied to that bit.
Result of Verify-Read
after Write Pulse
Application (V)
0
1
0
1
(X)
Result of Operation
1
0
1
Comments
Programming completed: reprogramming
processing not to be executed
Programming incomplete: reprogramming
processing to be executed
Still in erased state: no action
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