PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 50

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PEB22554

Manufacturer Part Number
PEB22554
Description
ICs for Communications
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet

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2.048 MHz cycle and is clocked off with the rising or falling edge of the clock which is
in/output on port SCLKR.
Figure 16
System Interface
System Interface Multiplex Mode
Setting this bit enables a single rail data stream of 16.384 or 8.192 MBit/s containg all
four E1 frames. The receive system interface for all four channels is running with the
clock provided on SCLKR1 and the frame sync pulse provided on SYPR1. The transmit
system interface is running with SCLKX1 and SYPX1. Data will be transmitted / accepted
Semiconductor Group
Receive
Data
Receive
Clock
Transmit
Data
Transmit
Clock
Attenuator
Receive
Jitter
BYP.
DCO-R
Attenuator
Signaling
Signaling
Transmit
Transmit
Transmit
Receive
Receive
Elastic
Elastic
Buffer
Buffer
Buffer
Buffer
Jitter
BYP.
50
TCLK
RCLK
PLB
Backplane
Backplane
Transmit
Receive
RSIGM
RSIG
RMFB
RFM
DLR
FREEZ
RFSPQ
XSIG
SYPXQ
XMFS
TCLK
XSIGM
XMFB
DLX
XCLK
Functional Description E1
PEB 22554
SYRPQ
ITS10298
XDI
SCLKR
DCO-R
RP(A-D)
DCO-R
RDO
SCLKX
XP(A-D)
09.98

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