PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 344

• Manufacturer Part Number: PEB22554
• Description: ICs for Communications
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Framer Receive Status Register 2 (Read)
FRS2
ESC2…ESC0… Error Simulation Counter
Tested Alarms ESC2…ESC0 =
LFA
LMFA
RRA (bit2 =0)
RRA (S-bit fr. 12)
RRA (DL-pattern)
LOS
EBC (F12,F72)
EBC (only ESF)
AIS
FEC
CVC
CEC (only ESF)
RSP
RSN
XSP
XSN
BEC
COEC
Some of these alarm indications are simulated only if the QuadFALC is configured in the
appropriate mode. At simulation steps 0, 3, 4, and 7 pending status flags are reset
automatically and clearing of the error counters and interrupt status registers ISR0-3
should be done. Incrementing the simulation counter should not be done at time intervals
Semiconductor Group
7
ESC2
This three-bit counter is incremented by setting bit FMR0.SIM. The
state of the counter determines the function to be tested:
For complete checking of the alarm indications, eight simulation steps
are necessary (FRS2.ESC = 0 after a complete simulation).
ESC0
0
344
x
1
x
x
x
x
x
x
x
x
2
x
x
x
x
x
x
x
x
x
x
x
x
Operational Description T1 / J1
3
4
5
x
x
x
x
x
0
x
x
x
PEB 22554
6
x
x
x
x
x
x
x
x
x
(x4E)
7
09.98