PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 221

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PEB22554

Manufacturer Part Number
PEB22554
Description
ICs for Communications
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet

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• Generation of control signals to synchronize the CRC checker, and the receive elastic
If programmed and applicable to the selected multiframe format, CRC checking of the
incoming data stream is done by generating check bits for a CRC multiframe according
to the CRC 6 procedure (refer to ITU-T Rec. G.704). These bits are compared with those
check bits that are received during the next CRC multiframe. If there is at least one
mismatch, the CRC error counter (16 bit) will be incremented.
Receive Elastic Buffer
The received bit stream is stored in the receive elastic buffer. The memory is organized
as a two-frame elastic buffer with a maximum size of 2
buffer may be independently configured for the receive and transmit direction.
Programming of the receive buffer size is done by SIC1.RBS1/0 :
• RBS1/0 = 00 : two frame buffer or 386 bits
• RBS1/0 = 01 : one frame buffer or 193 bits
• RBS1/0 = 10 : short buffer or 96 bits :
• RBS1/0 = 11 : Bypass of the receive elastic buffer
The functions are:
• Clock adaption between system clock (SCLKR) and internally generated route clock
• Compensation of input wander and jitter.
Semiconductor Group
buffer.
Maximum of wander amplitude (peak-to-peak): (1 UI = 648 ns )
System interface clocking rate: modulo 2.048 MHz:
142 UI in channel translation mode 0
78 UI in channel translation mode 1
System interface clocking rate: modulo 1.544 MHz:
max. wander: 126 UI
average delay after performing a slip: 1 frame or 193 bits
System interface clocking rate: modulo 2.048 MHz:
Max. wander : 80 UI in channel translation mode 0
Max. wander : 50 UI in channel translation mode 1
System interface clocking rate: modulo 1.544 MHz:
max. wander: 74 UI
average delay after performing a slip: 96 bits
System interface clocking rate: modulo 2.048 MHz:
Max. wander : 28 UI in channel translation mode 0; channel translation mode 1 not
supported
System interface clocking rate: modulo 1.544 MHz:
max. wander: 38 UI
average delay after performing a slip: 48 bits
(RCLK).
221
Functional Description T1 / J1
193 bit. The size of the elastic
PEB 22554
09.98

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