PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 120

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PEB22554

Manufacturer Part Number
PEB22554
Description
ICs for Communications
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet

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Transmit Control 1 (Read/Write)
Value after RESET: 9C
XC1
XCO7…XCO0… Transmit Offset
Receive Control 0 (Read/Write)
Value after RESET: 00
RC0
SWD …
Semiconductor Group
7
7
SWD
XCO7
A write access to this address resets the transmit elastic buffer to its
basic starting position. Therefore, updating the value should only be
done when the QuadFALC is initialized or when the buffer should be
centered. As a consequence a transmit slip may occur.
Calculation of delay time T (SCLKX cycles) depends on the value X
of the „Transmit Offset“ register XC1/0:
0
4+ SC/SD
Delay time T = time between beginning of time-slot 0 ( bit 0 , channel
phase 0) at XDI / XSIG and the initial edge of SCLKX after SYPX /
XMFS goes active. See figure 20 + 21.
with max. delay = (256 * SC/SD) -1
with SC = System clock defined by SIC1.SSC1/0
with SD = system data rate
Service Word Condition Disable
0…
1…
ASY4
T
H
H
Standard operation. Three or four consecutive incorrect service
words (depending on bit RC1.ASY4) will cause loss of
synchronization.
Errors in service words have no influence when in synchronous
state. However, they are used for the resynchronization
procedure.
3 + SC/SD :
CRCI
T
max. delay :X = 2051 - T + SC/SD
XCRCI
120
RDIS
X = 3 + SC/SD - T
RCO10
Operational Description E1
RCO9
0
0
XCO0
RCO8
PEB 22554
(x23)
(x24)
09.98

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