PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 285

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PEB22554

Manufacturer Part Number
PEB22554
Description
ICs for Communications
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet

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Transmit FIFO (WRITE) XFIFO
Up to 32 bytes/16 words of received data can be read from the RFIFO following an RPF
or an RME interrupt.
Writing data to XFIFO can be done in 8-bit (byte) or 16-bit (word) access. The LSB is
transmitted first.
Up to 32 bytes/16 words of transmit data can be written to the XFIFO following an XPR
(or ALLS) interrupt.
Command Register (Write)
Value after RESET: 00
RMC…
RRES…
XREP…
Semiconductor Group
XFIFO
CMDR
7
7
RMC
XF7
Receive Message Complete
Confirmation from CPU to QuadFALC that the current frame or data
block has been fetched following an RPF or RME interrupt, thus the
occupied space in the RFIFO can be released.
Receiver Reset
The receive line interface except the clock and data recovery unit
(DPLL), the receive framer, the one second timer and the receive
signaling controller are reset. However the contents of the control
registers will not be deleted.
Transmission Repeat
If XREP is set to one together with XTF (write 24H to CMDR), the
QuadFALC repeatedly transmits the contents of the XFIFO (1 32
bytes) without HDLC framing fully transparently, i.e. without
FLAG,CRC.
The cyclic transmission is stopped with an SRES command or by
resetting XREP.
Note: During cyclic transmission the XREP- bit has to be set with
RRES
H
every write operation to CMDR.
XREP
XRES
285
XHF
Operational Description T1 / J1
XTF
XME
0
0
SRES
XF0
PEB 22554
(x00/x01)
(x02)
09.98

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