PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 207

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PEB22554

Manufacturer Part Number
PEB22554
Description
ICs for Communications
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet

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FIFO Structure
In transmit and receive direction of the signaling controller 64-byte deep FIFOs for each
channel are provided for the intermediate storage of data between the system internal
highway and the CPU interface. The FIFOs are divided into two halves of 32-bytes. Only
one half is accessible to the CPU at any time.
In case 16-bit data bus width is selected by fixing pin DBW to logical ‘1’ word access to
the FIFOs is enabled. Data output to bus lines D0-D15 as a function of the selected
interface mode is shown in figure 39 and 40. Of course, byte access is also allowed.The
effective length of the accessible part of RFIFO may be changed from 32 bytes (RESET
value) down to 2 bytes independent for each channel.
Figure 39
FIFO Word Access (Intel Mode)
Semiconductor Group
D15
32
32
1
4
3
2
1
D8 D7
RFIFO
Byte 4
Byte 3
Byte 2
Byte 1
D0
207
D15
32
32
1
4
3
2
1
Functional Description T1 / J1
D8
XFIFO
Byte 4
Byte 3
Byte 2
Byte 1
D7
PEB 22554
ITD01798
D0
09.98

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