PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 173

• Manufacturer Part Number: PEB22554
• Description: ICs for Communications
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Interrupt Status Register 0 (Read)
Value after RESET: 00
ISR0
All bits are reset when ISR0 is read.
If bit GCR.VIS is set to ‘1’, interrupt statuses in ISR0 may be flagged although they are
masked via register IMR0. However, these masked interrupt statuses neither generate a
signal on INT, nor are visible in register GIS.
RME…
RFS…
T8MS…
Semiconductor Group
7
RME
Receive Message End
One complete message of length less than 32 bytes, or the last part
of a frame at least 32 bytes long is stored in the receive FIFO,
including the status byte.
The complete message length can be determined reading the RBCH,
RBCL registers, the number of bytes currently stored in RFIFO is
given by RBC4–0. Additional information is available in the RSIS
register.
Receive Frame Start
This is an early receiver interrupt activated after the start of a valid
frame has been detected, i.e. after an address match (in operation
modes providing address recognition), or after the opening flag
(transparent mode 0) is detected, delayed by two bytes. After an RFS
interrupt, the contents of
are valid and can be read by the CPU.
Receive Time Out 8 msec
Only active if multiframing is enabled.
The
FRS0.LFA = 0 and is searching for the multiframing. This interrupt will
be set to indicate that no multiframing could be found within a time
window of 8 msec. In multiframe synchronous state this interrupt will
be not generated. Refer also to Floating multiframe alignment
window.
RFS
• RAL1
• RSIS - bits 3-1
H
framer
T8MS
has
RMB
found
173
CASC
the
doubleframing
CRC4
Operational Description E1
SA6SC
0
(basic
RPF
PEB 22554
framing)
(x68)
09.98