PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 280

• Manufacturer Part Number: PEB22554
• Description: ICs for Communications
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Note: Read access to unused register addresses: value should be ignored.
8.3
The following is a suggestion for a basic initialization to meet most of the T1
requirements. Depending on different applications and requirements any other
initialization can be used.
LIU Initialization
FMR0.XC0/1
FMR0.RC0/1
LIM1.DRS
CCB1-3
PCD = 0x0A
PCR = 0x15
LIM1.RIL2-0 = 0x0
2
GCR.SCI = 1
LIM2.LOS2/1 = 01
Framer Initialization
Semiconductor Group
FMR4.SSC1/0
FMR4.FM1/0
Write access to unused register addresses: should be avoided, or set to ‘00’hex.
All control registers (except XFIFO, XS1-12, CMDR, DEC) are of type: Read/Write
Specific T1 Initialization
The QuadFALC supports requirements for the analog line
interface as well as the digital line interface. For the analog line
interface the codes AMI (with and without bit 7stuffing) and B8ZS
are supported. For the digital line interface modes (dual or single
rail) the QuadFALC supports AMI (with and without bit 7 stuffing)
and B8ZS.
LOS detection after 176 consecutive “zeros” (fulfills G.775 spec,
Bellcore/AT&T)
LOS recovery after 22 “ones” in the PCD intervall. (fulfills G.775,
Bellcore/AT&T)
LOS threshold of 0.6 V (fulfills G.775).
Additional Recovery Interrupts. Help to meet alarm activation and
deactivation conditions in time.
Automatic pulse densitiy check on 15 consecutive zeros for LOS
recovery condition (Bellcore requirement)
Selection of framing sync conditions
Select framing format
280
Operational Description T1 / J1
PEB 22554
09.98