PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 310

• Manufacturer Part Number: PEB22554
• Description: ICs for Communications
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Idle Channel Code Register (Read/Write)
Value after RESET: 00
IDLE
IDL7…IDL0…
Transmit DL-Bit Register 1-3 (Read/Write)
Value after RESET: 00
XDL1
XDL2
XDL3
XDL1…XDL3…
Semiconductor Group
7
7
XDL17
XDL27
XDL37
IDL7
Idle Channel Code
If channel loop back is enabled by programming the register
LOOP.ECLB = 1, the contents of the assigned outgoing channel at
ports XL1/XL2 respective XDOP/XDON is set equal to the idle
channel code selected by this register.
Additionally, the specified pattern overwrites the contents of all
channels of the outgoing PCM frame selected via the idle channel
registers ICB1…ICB3. IDL7 will be transmitted first.
Transmit FS/DL-Bit Data
The DL-bit register access is enabled by setting bits FMR1.EDL = 1.
With the transmit multiframe begin an interrupt ISR1.XMB is
generated and the contents of these registers XDL1-3 will be copied
into a shadow register. The contents will subsequently sent out in the
data stream of the next outgoing multiframe if no transparent mode is
enabled. XDL10 will be sent out first.
In F4 frame format only XDL10+XDL11 will be transmitted. In F24
frame format XDL10-XDL23 will be shifted out. In F72 frame format
XDL10-XDL37 will be transmitted.
The transmit multiframe begin interrupt (XMB) requests that these
registers should be serviced. If requests for new information will be
ignored, current contents will be repeated.
XDL16
XDL26
XDL36
H
H
, 00
XDL15
XDL25
XDL35
H
, 00
H
XDL14
XDL24
XDL34
310
XDL13
XDL23
XDL33
XDL12
XDL22
XDL32
Operational Description T1 / J1
XDL11
XDL21
XDL31
0
0
XDL10
XDL20
XDL30
IDL0
PEB 22554
(x2C)
(x2D)
(x2B)
(x2E)
09.98