PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 281

• Manufacturer Part Number: PEB22554
• Description: ICs for Communications
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Signaling Controller Initialization
Initialization of the HDLC controller:
MODE = 0x88
CCR1 = 0x18
IMR0.RME = 0
IMR0.RPF = 0
IMR1.XPR = 0
RTR4.0 = 1
XTR4.0 = 1
Initialization of the CAS-BR Controller
FMR5.EIBR = 1
IMR1.CASE = 0
IMR0.RSC = 0
After the device initialization a software reset should be executed by setting of bits
CMDR.XRES/RRES.
Semiconductor Group
FMR2.AXRA = 1
FMR4.AUTO = 1
The transmission of RAI via the line interface is done automatically
by the QuadFALC in case of Loss of Frame Alignment
(FRS0.LFA = 1). If framing has been reinstalled RAI is
automatically reset
Automatic synchronization in case of definite framing candidate
(FRS0.FSRF).
In case of multiple framing candidates and CRC6 errors different
resynchronization conditions can be programmed via
FMR2.MCSP/SSP.
HDLC Receiver active, No address comparison
Enable Signaling via time-slot 0-31, Interframe Time Fill with
continous FLAGs
Select interrupts for HDLC processor requests
Select time-slot 24 for HDLC data reception and transmission
Enable CAS-BR Mode
Send CAS-BR information stored in XS1-12
Enable interrupts which indicate the access to the XS1-12
CAS-BR registers and any data change in RS1-12
281
Operational Description T1 / J1
PEB 22554
09.98